Chapter 3Bandgap and LDO

Voltage sources in integrated circuits are usually divided into  voltage reference sources and linear regulators.As a stable reference,the bandgap reference and lowdropout(LDO) linear regulator is very important in different modules of analog and mixedsignal integrated circuits.As the voltage and current source the output voltage of bandgap has characteristics independent of temperature.And LDO provides a stable,pure DC voltage reference for onchip circuits as a basic power supply system.
3.1Bandgap
As a very important module of analog and mixedsignal IC,the voltage reference source plays a very important role in various electronic systems.With the increasing performance demand for various electronic products,the requirements for voltage reference source are also increasing.The voltage sources output voltage and noise determines the performance of circuits and systems.
The bandgap is fully compatible with standard CMOS process and can work at low power supply voltage.In addition,it has low temperature drift,low noise and high power supply rejection ratio,which can meet the requirements of most electronic systems.With these advantages,the bandgap has been widely studied and applied.In CMOS bandgap,low power supply voltage,low power consumption,high precision and high PSRR are the future development direction.
3.1.1Basic of bandgap
Many modules in integrated circuits require voltage sources and current sources independent of temperature,which often affects the function of these modules.So how can we get a constant voltage or current reference that has nothing to do with the temperature? We assume that there are two identical physical quantities in the circuit.These two physical quantities have opposite temperature coefficients.When the two physical quantities are added to a certain weight,the voltage reference of zero temperature coefficient can be obtained,as shown in Fig.3.1.



Fig.3.1Principle diagram of zero temperature coefficient



In Fig.3.1,the voltage source V1 has a positive temperature coefficient V1T>0,and the voltage source V2 has a negative temperature coefficient V2T<0.We choose two weights of α1 and α2 to satisfy α1·V1T+α2·V2T=0,then the voltage reference  of zero temperature coefficient is obtained： Vref=V1·α1+V2·α2.The following task is how to get two voltage V1 and V2 with opposite temperature coefficients.In semiconductor technology,bipolar transistors can provide physical quantities of positive and negative temperature coefficient respectively.They are widely used in the design of bandgap reference.Recently,various literatures have also mentioned that the positive and negative temperature coefficients can be obtained by using MOS transistors working in subthreshold regions,but the accuracy of subthreshold region models needs to be investigated further.And the modern standard CMOS process provides the model of longitudinal PNP bipolar transistor,making the bipolar transistor still the first choice for bandgap reference.




1. Negative temperature coefficient voltage V2T<0
For a bipolar transistor,the relationship between the collector current Ic and the baseemitter voltage VBE is as follows
Ic=Is·exp(VBE/VT)（31）
VBE=VT·ln(IC/Is)（32）
In equation （31） and （32）,Is is the saturation current of transistor,VT is the thermal voltage,VT=kT/q,K is the Boltzmann constant,and Q is electronic charge.The derivative of equation （32） for VBE is
VBET=VTTlnIcIs-VTIsIsT（33）
Obtained from the theory of semiconductor physics： 
Is=b·T4+mexp-EgkT（34）
The derivative of （34） for temperature： 
VTIsIsT=(4+m)VTT+EgkT2VT（35）
from equation（33） and （35）： 
VBET=VBE-(4+m)VT-Eg/qT（36）
where m≈1.5，When the substrate is silicon,Eg=1.12eV.While VBE=750mV,T=300K,VBET=-1.5mV/℃。
It is known from equation （36） that the temperature coefficient VBET of VBE itself is related to the temperature T.If the positive temperature coefficient is a temperature independent value,there will be errors in temperature compensation,resulting in a voltage reference that can only get a zero temperature coefficient at one temperature point.
2. Positive temperature coefficient voltage V1T>0
If two identical bipolar transistors are biased at different collector current,the difference between their baseemitter voltage is proportional to the absolute temperature,as shown in Fig.3.2.



Fig.3.2Positive temperature coefficient voltage circuit



As shown in Fig.3.2,two identical bipolar transistors Q1 and Q2,which are biased at different collector current I0 and nI0.Ignoring their base current,there is： 
ΔVBE=VBE1-VBE2=VTlnIc1Is1-VTlnIc2Is2=VTlnnIIs1-VTlnIIs2（37）
There also is Is1=Is2=Is，Ic1=nIc2，then
ΔVBE=VTlnnIIs-VTlnIIs=VTlnn=kTqlnn（38）
The derivative of （38） for temperature： 
ΔVBET=kqlnn>0（39）
We can see that there is a positive temperature coefficient in equation （39）,which is independent of temperature T.
3. Zero temperature coefficient voltage reference VREFT=0
By using the voltage of positive and negative temperature coefficients obtained in the above two sections,a voltage reference VREF independent of temperature can be obtained,as shown in Fig.3.3,equation （310） can de derived： 
VREF=α1·kTqlnn+α2·VBE（310）
The following shows how to select α1 and α2,then get the zero temperature coefficient voltage VREF. At room temperature(300K),there is a negative temperature coefficient voltage VBET=-1.5mV/K,and positive temperature coefficient voltage is ΔVBET=kqlnn=0.087mV/K·lnn
The derivative of （310） for temperature
VREFT=α1·kqlnn+α2·VBET （311）
assuming （311） equal to zero and α2=1,put the positive and negative temperature coefficient voltage in （311）： 
α1·lnn=17.2（312）
So the zero temperature coefficient voltage reference is
VREF≈17.2kTq+VBE≈1.25V（313）



Fig.3.3Zero temperature coefficient voltage reference 



4. Circuit of Zero temperature coefficient voltage reference 
From the analysis of the previous section,the zero temperature coefficient voltage reference  is obtained by adding the baseemitter voltage VBE and 17.2*kT/q.The zero temperature coefficient  voltage reference circuit is shown in Fig.3.4.Suppose the voltage V1=V2 in Fig.3.4,then the left and right branches are equation （314） and （315）,respectively.
V1=VBE1（314）
V2=VBE2+IR（315）
then
VBE1=VBE2+IR（316）
so
IR=VBE1-VBE2=kT/q·lnn（317）
put （317） into （315）,
V2=VBE2+kT/q·lnn（318）
Comparing （318） with （313）,it is known that this circuit can obtain zero temperature coefficient voltage reference.The problem is how to make the voltage at both ends of the circuit equal in Fig.3.4,that is,V1=V2?


Figure 3.4zero temperature coefficient voltage reference circuit



We know that when the ideal OPA operates normally,the voltage at the two input is approximately equal,so the following two circuits in Fig.3.5 and 3.6 can be generated,making V1=V2,respectively.There are two main kinds of circuit structure to complete adding,one is to add the two through an OPA.And its output is the voltage reference.The other is to generate a current proportional to absolute temperature(PTAT),which can be converted into a voltage through a resistor.This voltage naturally has a positive temperature coefficient,which is then added to the baseemitter voltage VBE.



Fig.3.5the voltage reference circuit A




Fig.3.6the voltage reference circuit B



In Fig.3.5,the input voltage of operational transconductance amplifier(OTA) is V1 and V2,and the output is Vref that drives resistor R2 and R3.OTA makes the input voltage V1 and V2 approximately equal.The voltage difference between the baseemitter of the two bipolar transistors is VT lnn,and the current that flows through R1 is
I2=VTlnnR1（319）
get Vref is，
Vref=VBE,nQ1+I2R1·(R1+R3)=VBE,nQ1+1+R3R1VTlnn（320）
Combination of （313） and （320） shows that at room temperature 300K,zero temperature coefficient voltage can be obtained： Vref ≈ 1.25V.
Fig.3.6 is another circuit for obtaining a voltage reference.The principle of this circuit is to generate a current which is directly proportional to absolute temperature,and then convert it to voltage through resistor.Finally,the voltage is added to VBE of bipolar transistor to get the  voltage reference.As in Fig.3.6,the current produced by the middle branch is still as equation （319）.The current is PTAT,and the right mirror branch also produces a current of PTAT.This current flows through the resistor to form the PTAT voltage,and finally the baseemitter voltage of bipolar transistor Q2 is added to obtain the voltage reference 
Vref=VBE,Q2+R2R1VTlnn（321）
The combination of （313） and （321） shows that a voltage reference of zero temperature coefficient can be obtained when R2(lnn) /R1=17.2 is used.Then when R2/R1=10,we can choose n = 6.



Fig.3.7the voltage reference circuit C



Figure 3.7 is the third circuit for obtaining a voltage reference.The basic principle of this circuit is similar to that of second kinds.The difference is that two resistors (R3=R4=R) are added to the nodes V1 and V2 respectively,and the current flowing through the resistor is IR=V2/R4=VBE1/R,So the current IM2 flows through the MOS transistor： 
IM2=IR+IR1=VBE1R+VTlnnR1（322）
If the MOS transistors size(W/L)3=(W/L) 2,then there is IM3=IM2,and the voltage reference Vref is obtained
Vref=IM3R2=VBE1R+VTlnnR1R2（323）
It is known from equation （323） that the voltage reference of this structure can be obtained by adjusting the resistor value of R2.The first two structures can only get the reference voltage of 1.25V.
5. Offset in OTA 
In Fig.3.8,Vos is the offset voltage of OTA.The offset voltage makes the voltage reference error,and this error is also related to the temperature.Suppose that the OTA is ideal,so there is
VBE,Q1-Vos≈VBE,nQ1+R1Ic（324）
where Ic is the current flowing through resistor R1 and bipolar transistor nQ1,and the output voltage of OTA is
Vref=VBE,nQ1+（R1+R3）Ic=VBE,nQ1+（R1+R3）Ic（325）
combine（324） with （325）： 



Fig.3.8Offset of OTA in Zero temperature coefficient voltage reference circuit



Vref=VBE,nQ1+1+R3R1（VTlnn-Vos）（326）
Vref=VBE,nQ1+1+R3R1VTlnn-1+R3R1Vos（327）
According to equation （327）,there is an error in the output voltage reference because of the offset voltage in OTA.This error is the result of(1+R3/R1) times of OTA offset.There are several circuits that can reduce the offset voltage： 
（1） Increase the area of input transistors of an OTA,reduce the offset voltage by the design of the commoncentroid layout.
（2） In high power supply,two bipolar transistors can be used in series,which makes ΔVBE increase.
（3） Differnent current of two branches makes ΔVBE increase from lnn to ln(MN),and reduces the ratio of Vos to Vref,of which m and N are positive integers.
6. Startup of bandgap
As shown in Fig.3.6,the bandgap actually has two operating points,one is the working point when the circuit is normal,and the other is the zero current point.In poweron process,all the transistors in the circuit do not have current,and this state will be kept forever without no external interference.This is the problem of startup.
In order to solve the startup problem,an additional circuit is needed.The basic requirement of the startup circuit is that after the power supply is stable,when circuit is in the "zero current" working state,the startup circuit gives a stimulus to the internal circuit node,which forces it to get rid of the "zero current" working state and fall into the normal working mode.And when circuit is in normal operating mode,the startup circuit stops working.The startup circuit is in the right part in Fig.3.9.



Fig.3.9Bandgap with startup circuit



In Fig.3.9,when the supply voltage is normally supplied and there is no current in the reference circuit,that is,PMOS transistor PM4 and PM5 have no current to pass through.While the node Net1 voltage is zero,PMOS transistor PM3 turns on,NMOS transistor NM1 cuts off.So the voltage of node net3 is Vdd-2VBE,which turns on NMOS transistor NM2 and makes node net4 connect to ground.Finally,the PMOS transistor PM4 and PM5 are on,and the voltage of node Net1 gradually increases to about 2VBE.The bandgap get to be operating normally.
Then in startup circuit,the NMOS transistor NM1 is on,and PM3 is off,which makes the voltage of node net3 decrease gradually and NM2 is gradually cut off.After the normal operation of bandgap circuit,the two branches of startup circuit stop working(NM2/PM3 is off).
3.1.2Bandgap design
The performance of bandgap determines the precision that analog circuit can achieve,so its performance paremeter needs to be set according to the precision of functional module.Because the bandgap circuit mainly provides DC voltage(current),its lowfrequency AC(<10kHz),temperature and voltage characteristics are highly demanded.The main design difficulty is that it has good AC characteristics and stability while obtaining a lower temperature coefficient.The following is a brief introduction to its performance parameter.
1. Parameter
1) Temperature Coefficient(TC)
The temperature coefficient is a performance specification to measure the output voltage as a function of temperature.It is usually represented by ppm(parts per million).The equation is shown in （328）.
TC（ppm/℃）=Vmax-VminVmean（Tmax-Tmin）×106（328）
where Vmax and Vmin are the maximum and minimum values of voltage reference obtained at required temperature range.Vmean is the average,while Tmax and Tmin are the maximum and minimum temperature.
2） Power Supply Rejection Ratio(PSRR)
Power supply rejection ratio is a parameter to measure the ability of output voltage to suppress the variation of power supply voltage.Because the power supply voltage is not fixed during the normal operation,there are various kinds of noises.The greater the PSRR,the stronger the circuit's ability to suppress the power noise.There is
PSRR|Hz=-20log10（Vref/VDD）(dB)（329）
Vref/VDD is the ratio of the voltage reference to the change of power supply voltage at a certain frequency.The frequency we usually care about is 1kHz and 10kHz.
3) Power
Power consumption is a concern for any kind of integrated circuits.The lower power consumption means less power dissipation per unit time,which is especially important for IC packaging.Power consumption is also important for handheld devices,which is related to the lifetime of mobile device.But if the power consumption is too demanding,there may be noise and driving problems,so the power consumption of bandgap circuit should be in a reasonable range.
4) Startup
The startup of bandgap is not a quantitative parameter,but it determines whether its function is normal.Startup problems are not observed in the usual simulation of transient,DC,and parameter scanning.Since there are two DC operating points in bandgap,if we want bandgap to leave the zero current state and enter normal working mode,we need to add the necessary "stimulus" to start the circuit.The normal operation of bandgap is usually confirmed by adding 0 to VDD slope voltage signals on power supply.
2. Circuit design
A complete circuit of a bandgap is shown in Fig.3.10.



Fig.3.10Bandgap circuit



The bandgap is mainly divided into three parts,from left to right,followed by voltage bias circuit(Bias),voltage reference generator(Reference Circuit) and startup circuit(Startup).The voltage bias circuit is used to generate bias voltage when OTA works normally.From the Fig.3.10,we can see that voltage bias comes from voltage reference generator.The voltage  reference generator is used to generate the required voltage reference(1.25V).We usually use the bipolar transistors in series to obtain the positive temperature coefficient voltage,which is helpful to reduce the influence of OTA offset to reference voltage.
As the positive temperature coefficient voltage is obtained by using the bipolar transistors in series,the current of resistor R2 is I2 in Fig.3.10.
I2=2VTlnnR2（330）
The resulting voltage reference  Vref
Vref=VBE,Q2+2R3R4VTlnn（331）
VREFT=VBE,Q2T+2R3R4·kqlnn（332）
putVBET=-1.5mV/K，ΔVBET=kqlnn=0.087mV/K·lnn into （332）
R3R4·lnn=8.6（333）
When we choose n=7,R3≈5R4；And R3=5kΩ，R4=25kΩ.
For OTA in a bandgap,the more important performance parameters are DC gain,gain bandwidth product,phase margin,and power supply rejection ratio.The OTA circuit is shown in Fig.3.11.



Fig.3.11OTA circuit


Because the output voltage accuracy and PSRR of bandgap is related to the DC gain of OTA,the twostage structure is selected to increase its DC gain.The first stage uses a simple fivetransistor structure to gain medium gain,and the second stage uses common source to provide a certain gain while providing a larger output swing.The capacitor CC0 between the first and second stage is the Millercompensation capacitor.It is used to separate the two adjacent poles of OTA,pushing the dominant pole to the origin and making the second pole leave the unit gain bandwidth.In addition,the second pole is further offset by resistor RC0,which makes OTA have the characteristic of monopole and has a better phase characteristic.
In order to optimize the noise and offset voltage,we must ensure that the input transistors of the first stage have a large W/L and area.The large transconductance can effectively lower its flick noise.
3.2Lowdropout linear regulator
Whether it is portable consumer electronics or large household electrical appliances,in operation the constant changes in load and the other various reasons make the power supply fluctuate in a large range,which is very harmful to the circuit.Especially for highprecision measurement,conversion and detection equipment,the power supply voltage is often required to be stable and has low noise.In order to meet the requirements,almost all electronic devices are powered by a Lowdropout linear regulator(LDO).The LDO has the advantages of simple structure,low cost,low noise and so on.It has been widely used in portable electronic equipment.
3.2.1Basis of LDO
As a basic power supply module,LDO plays a very important role in analog integrated circuits.The changes in output load and the fluctuation of power supply voltage itself have a great influence on the performance of integrated circuit system.As a result,LDO is used as a linear regulator and is often used in systems with high performance requirements.
LDO adjusts the output voltage by principle of negative feedback,and obtains the stable DC output voltage on the basis of providing a certain output current capability.In normal working state,the output voltage is independent of load,input voltage change and temperature.The minimum input voltage of LDO is determined by the minimum voltage drop of the adjusting transistor,usually 150300mV.
The basic structure of LDO is shown in Fig.3.12.LDO is mainly composed of the following parts： bandgap,error amplifier,feedback / phase compensation network,and adjusting transistor.The error amplifier,feedback resistor network,adjusting transistor and phase compensation network constitute the stable output voltage Vout of feedback loop.
In LDO,a bandgap provides a voltage reference independent of temperature and power.The error amplifier amplifies the difference between voltage reference and feedback voltage,so that the feedback voltage is basically equal to the voltage reference.Phase compensation network is used to compensate the phase of whole feedback network to ensure the feedback network is stable.The adjusting transistor outputs a stable voltage under the control of error amplifier output.The adjusting transistor is a PMOS transistor,and can also be a NMOS ora NPN transistor.In CMOS process,the PMOS is usually selected.



Fig.3.12LDO structure



3.2.2Operational principle
Fig.3.13 is a LDO curve of the relationship between output voltage and input voltage.The abscissa are the input voltage 03.3V,and the ordinate is output voltage.When the input voltage is less than a certain value(1.21.8),the output voltage is zero.When the input voltage Vin is greater than it(1.21.8V),the output voltage Vout increases with Vin.When Vin is greater than 2.1V,LDO is in normal operating state and the output voltage is stable at 1.8V.



Fig.3.13the relationship between output voltage and input voltage


The operational principle of LDO shown in Fig.3.12 is： when LDO is on power,the startup circuit in bandgap begins to work to ensure that the whole system begins to operate normally.The bandgap outputs a stable voltage reference Vref which is independent of supply voltage and temperature,while the R1 and R2 of the feedback / phase compensation network generate feedback voltage Vfb. The two voltages are input to error amplifier for comparison.The error amplifier amplifies the result and adjusts the gate voltage of transistors to control their current,finally stabilizes the output voltage.The whole adjustment loop is a stable negative feedback system.When the input voltage Vout increases,the input Vfb of feedback resistor network will also increase.Vfb and Vref are compared and amplified,so that the gate voltage of the transistors is increased,and the output current is reduced.At last the output voltage Vout decreases and stays at a stable voltage value.
The closed loop expression of negative feedback loop is
Vout=Aol1+AolβVref（334）
where Aol is the openloop gain of negative feedback loop,and β is the feedback coefficient,and its expression is
β=R2R1+R2（335）
when Aolβ1，equation （334） can be expressed as
Vout≈Vrefβ=R1+R2R2Vref（336）
It can be seen from （335） and （336），the output voltage Voutof LDO is only related to the voltage reference Vref and the resistor ratio of feedback resistor network.It has nothing to do with the input voltage Vin,load current and temperature.Therefore,the required output voltage can be obtained by adjusting the resistor ratio.
3.2.3Parameter
The main parameter of LDO are divided into static and dynamic parameter.The static parameter includes dropout voltage、quiescent current and efficiency.And dynamic parameter consists of transient response、line regulation、load regulation and power supply rejection ratio.
1. Dropout Voltage
When input voltage Vinis less than a certain value of Vcutoff,the LDO output zero voltage,and it is in the cutoff region; While Vin is between Vcutoff and critical voltage VBreak,the output voltage is not fixed,and LDO has no adjustment ability; And when Vin is greater than VBreak,LDO enters normal operating state and the output voltage remains unchanged.We define that the difference between VBreak and output voltage is the dropout voltage of LDO,and the dropout voltage is usually 150mV300mV.Its expression is 
Vdrop=Vin-VBreak（337）
In general,the smaller dropout voltage is beneficial to improve the conversion efficiency of LDO.However,a too small dropout voltage may cause a poor phase margin and power supply rejection ratio to the whole feedback loop,so a compromise should be considered in LDO design.
2. Quiescent Current
Quiescent current(IQ) usually refers to the current consumed by the whole LDO when it is not connected to any load,or it is defined as the difference between input current and output current with output load.The expression is shown
IQ=Iin-Iout（338）
The quiescent current is mainly composed of the bias current of active devices such as bandgap,error amplifier,active compensation network(if exist),and the current consumed by the feedback resistor network.The smaller quiescent current is beneficial to improve the conversion efficiency of LDO and the life of the battery.In CMOS integrated circuit,the quiescent current of the LDO is in the dozens of μA or smaller.
3. Efficiency
The efficiency of LDO is defined as the percentage of ratio of output power Pout to input power Pin
β=PoutPin·100%=Iout·VoutIin·Vdd·100%=（Iin-IQ)·（Vdd-Vdrop）Iin·Vdd·100%（339）
where Iin is input current,Vdd is supply voltage,IQ is quiescent current and Vdrop is dropout voltage.
We can know that from （339）,the efficiency of LDO related to quiescent current and dropout voltage.The way to improve efficiency is to reduce IQ and Vdrop.
4. Transient Response
The transient response of LDO includes two aspects： ① the linear transient response due to supply voltage change; ② the load transient response when load and output voltage suddenly changes.The linear transient response is more important in frequent power up and power down application,while the load transient response is more important when the load current changes frequently.In specific application,the latter occurs in real time,so the load transient response is paid more attention in design.



Fig.3.14LDO load transient response


Fig.3.14 is the transient response of LDO.The upper half part is the step change of output load current,and the lower part is the output voltage change with load current.The changes in load transient response can be expressed
ΔVTR,max=I0·ΔtC0+ΔVESR（340）
I0 is load current.C0 is output capacitor.ΔVESR is the output voltage variation caused by the equivalent series resistor(ESR) of output capacitor.And Δt is step response time.In practical application,the smaller transient response time,the better of LDO performance.By equation （340）,with the fixed load current increasing the output capacitor,the closedloop bandwidth and ESR will reduce the amplitude of load transient response,thereby reducing the load response time.In LDO design,the frequency response method should be adopted to determine the stability of the whole feedback loop first.Because LDO is a closedloop system with multiple poles and negative feedback,if the design is improper,there may be a stability problem,which will naturally affect its timedomain transient characteristics.
5. Line Regulation
The line regulation of LDO is defined as the variation ratio of output to input voltage when input voltage changes under constant load.It can reflect the ability of LDO to restrain the change of input voltage.Its expression is
SLR=ΔVoutΔVin|Iout=constant（341）


Fig.3.15Line regulation of LDO


In Figure 3.15,it is assumed that the load current is kept at 50mA,and when the input voltage is 2.1V,the LDO enters adjustment state and outputs a 1.8V voltage.The input voltage is gradually increased to 5.4V,and the output voltage varies from 1.8V to 1.8132V,so the line regulation of LDO is
SLR=0.0132（5.4-2.1）Iout=50mA=4mV/V
6. Load Regulation
The load regulation of LDO is defined as the ratio of the output voltage variation ΔVout to the load current variation ΔIload when input voltage Vin remains unchanged.The load regulation reflects the influence of load current on output voltage,and the smaller,the better it is.Its expression is： 
SLOR=ΔVoutΔIloadVin=constant（342）
Figure 3.16 gives a schematic of load regulation,where Iload and ΔIload are load current and variation value respectively,and Vout and ΔVout are output voltage and output voltage variation value respectively.



Fig.3.16Circuit diagram for calculating load regulation



When the output load current changes to Iload+ΔIload,the output voltage changes to Vout+ΔVout,which makes the output voltage variation of feedback resistor network is delta ΔVfb
ΔVfb=ΔVout·R2R1+R2（343）
and ΔIload is
ΔIload=gmEA·gmp·ΔVfb（344）
gmEA  and gmp are the transconductance of error amplifier and adjusting transistor.Putting （343） and （344） into （342）,the expression of load regulation is
SLOR=1gmEAgmp·R1+R2R2|Vin=constant（345）
From equation （345）,we can see that we can improve load regulation by increasing the transconductance of error amplifier and adjusting transistor,and the feedback coefficient of feedback resistor network.
In Fig.3.17,assuming the input voltage Vin=3.3V,the load current is changed from 0 to 50mA,and the output voltage varies about 1.32mV near 1.8V,then load regulation is
SLOR=1.32mV50mA|Vin=3.3V=0.0264V/AVin=3.3V（346）


Fig.3.17Load regulation


7. Power Supply Rejection Ratio(PSRR)
The PSRR is defined as the ratio of output voltage variation to power supply voltage variation,that is,the smallsignal gain of output voltage to supply voltage in a certain frequency range.The PSRR reflects the ability of output voltage to suppress the noise of power supply.Its expression is
PSRR|Hz=20·log10ΔVoutΔVdddB（347）
The definition of PSRR is similar to line regulation,but there is an essential difference.The line regulation represents a large signal,DC characteristic,and a smallsignal and AC characteristic is expressed by PSRR.The PSRR is related to LDO structure,PSRR of bandgap and error amplifier.Fig.3.18 is a typical PSRR curve.Because LDO mainly provides DC voltage,the PSRR within 10KHz is more important.Usually highprecision circuits are required for PSRR within 100kHz.



Fig.3.18PSRR curve




3.2.4Stability analysis
LDO is a closedloop system with negative feedback.The system outputs feedback voltage to input terminal and compares with the  voltage reference for adjusting,finally making the output stable on a expected value.Due to the complexity of feedback system and existence of multiple zeropoles,there is a stability problem in itself.If the system is not designed properly,it will cause the whole negative feedback system to oscillate.Therefore we must analyze the openloop amplitudefrequency and phasefrequency characteristics,so as to ensure the stability.
Usually,the condition of ensuring stability is that the phase margin of openloop characteristic is greater than 45 degrees.Considering the transient characteristics,overshoot and other properties,the 60 degree is an ideal value.
General LDO compensates the poles to achieve a better openloop phase margin by using the equivalent series resistor(ESR) of offchip capacitors,as Fig.3.19 shows.



Fig.3.19LDO with offchip capacitors



In Fig.3.20,R1 and R2 are feedback network resistor,CC is offchip compensation capacitor,and RESR is the equivalent series resistor of compensation capacitor.The range of RESR is 10mΩ1Ω.CC generally takes a value of 0.1μF10μF,and a tantalum capacitor with good performance is generally used.Because the value of CC is large,the output node Vout is the dominant pole of LDO.Cpass is a bypass capacitor.Usually,when the load current changes suddenly and the output voltage generates large ripple,Cpass will reduce the ripple amplitude and make the output voltage stable quickly.The load capacitor CL is usually smaller than CC and Cpass.For simplicity,it is not considered in the following analysis.
When analyzing the smallsignal characteristic of offchip compensation LDO,we need to break a certain point in the feedback loop.Start from this point,analyzing the components of system sequentially,and finally returning to the starting point,as Fig.3.20 shows.


Fig.3.20Analysis of smallsignal characteristic for offchip compensation LDO


In Fig.3.21,we disconnect the feedback network and define error amplifier input Vfbi as the starting point of analysis,and the feedback resistor output is Vfbo.So the equivalent output resistor of error amplifier is REA,and the gate equivalent input capacitor of adjusting transistor is CGP,and the sourcedrain equivalent resistor is RDSP.
From Fig.3.21,the output resistor of Vout is Ro=（R1+R2）∥RDSP∥RL≈RDSP，its equivalent resistor is Zout，
Zout=Ro∥（1/sCb）∥（RESR+1/sCc）（348）
put （348） into （349）
Zout=Ro·（1+sRESRCc）s2RoRESRCcCpass+sCc（Ro+RESR）+RoCpass+1（349）
The openloop transfer function H(s) is
H（s）=VfboVfbi=R2R1+R2·gEAREAgMP1+sREACGP·Zout
H（s）=R2R1+R2·

gEAREAgMP（1+sRESRCc）1+s（R0+RESR）Cc·1+s（R0∥RESR）Cpass·（1+sREACGP）（350）
Considering R0≈RDSPR1+R2，R0RESR，the poles and zeroes of entire LDO openloop system are 
P1=-1（R0+RESR）·Cc=-1RDSP·Cc（351）
P2=-1（R0∥RESR）·Cpass=-1RESR·Cpass（352）
P3=-1REA·CGP（353）
Z1=-1RESR·Cc（354）
In general,P1<P2<P3,and P1<Z1<P2.The frequency response is shown in Fig.3.47.



Fig.3.21Frequency response



The system's openloop phase margin formula shows that if the phase margin is at least 60 degrees,there is only one pole in the unit gain bandwidth(UGB).Therefore it shows the characteristics of single pole system,and the non dominant pole is outside 2.2 times of UGB.In Fig.3.21,if the phase margin is up to 60 degrees,Z1 must be adjacent to P2 and P3>2.2UGB,which means that zero Z1 must be used to compensate for the non dominant pole P2.Furthermore the choice of the equivalent series resistance RESR must also be in a reasonable range.If RESR is too large,the zero Z1 near the low frequency will cause UGB to increase.It may cause pole P3 to go into UGB,and the phase margin becomes smaller,which results in the instability of system; But If the RESR is too small,the zero Z1 moves to high frequency,which may move out of UGB and can not achieve compensation.So RESR has an important impact on system's stability.In fact,due to the large size of adjusting transistor,the gatesource capacitor also constitutes a zero.
Because of error amplifier with large output impedance(REA) and gate capacitor of adjusting transistor(CGP),its output has a large time constant.Since its large and smallsignal response time are subject to these restrictions,LDO as shown in Fig.3.19 is not commonly used.In order to improve the accuracy and transient characteristics of LDO,a buffer is usually inserted between error amplifier and adjusting transistor.



Fig.3.22LDO with buffer



As shown in Fig.3.22,the voltage buffer isolates error amplifier from adjusting transistor,and divides the original pole P3 into two poles： P31 and P32.
P31=1REACBU（355）
P32=1RBUCGP（356）

Figure 3.23 is the amplitudefrequency characteristic of LDO with buffer.When the buffer is added,the poles P31 and P32 are greater than the original pole P3,so the system is more stable and improves its transient response time greatly.


Fig.3.23amplitudefrequency characteristic of LDO with buffer


3.3Technical words and phrases
3.3.1Terminology






bandgap带隙基准源
lowdropout linear regulator(LDO)低压差线性稳压器
positive （negetive） temperature coefficient正（负）温度系数
subthreshold region亚阈值区
Boltzmann constant玻尔兹曼常数
proportional to absolute temperature(PTAT)与绝对温度成正比
startup启动电路
error amplifier误差放大器
static parameter静态参数
dynamic parameter动态参数
dropout voltage电压差
quiescent current静态电流
efficiency转换效率
line regulation线性调整率
load regulation负载调整率
equivalent series resistor(ESR)等效串联电阻

3.3.2Note to the text
（1） The bandgap is fully compatible with standard CMOS process and can work at low power supply voltage.In addition,it has low temperature drift,low noise and high power supply rejection ratio,which can meet the requirements of most electronic systems.
带隙基准源与标准CMOS工艺完全兼容，可以工作于低电源电压下等优点，另外还具有低温度漂移、低噪声和较高的电源抑制比等性能，能够满足大部分电子系统的要求。
（2） In semiconductor technology,bipolar transistors can provide physical quantities of positive and negative temperature coefficient respectively.
在半导体工艺中，双极晶体管能够分别提供正、负温度系数的物理量。
（3） If two identical bipolar transistors are biased at different collector current,the difference between their baseemitter voltage is proportional to the absolute temperature.
如果两个相同的双极晶体管在不同的集电极电流偏置情况下，那么它们的基极发射极电压的差值与绝对温度成正比。
（4） There are two main kinds of circuit structure to complete adding,one is to add the two through an OPA.And its output is the voltage reference.The other is to generate a current proportional to absolute temperature(PTAT),which can be converted into a voltage through a resistor.This voltage naturally has a positive temperature coefficient,which is then added to the baseemitter voltage VBE.
完成这种相加的电路结构目前主要有两种，一种是通过运算放大器将两者进行相加，输出即为基准电压；另一种是先产生与温度成正比(PTAT)的电流，通过电阻转换成电压，这个电压自然具有正温度系数，然后与二极管的基极发射极电压VBE相加获得。
（5） In order to solve the startup problem,an additional circuit is needed.The basic requirement of the startup circuit is that after the power supply is stable,when circuit is in the “zero current” working state,the startup circuit gives an stimulus  to the internal circuit node,which forces it to get rid of the “zero current” working state and fall into the normal working mode.
为了解决电路的启动问题，需要加入额外电路，使得存在启动问题的电路摆脱“零电流”工作状态进入正常工作模式，对启动电路的基本要求是电源电压稳定后，待启动电路处于“零电流”工作状态时，启动电路给内部电路某一节点激励信号，迫使待启动电路摆脱“零电流”工作状态，而进入正常工作模式。
（6） In general,the smaller dropout voltage is beneficial to improve the conversion efficiency of LDO.However,a too small dropout voltage may cause a poor phase margin and power supply rejection ratio to the whole feedback loop,so a compromise should be considered in LDO design.
通常情况下，要求LDO的电压差越小越好，以提高整体电路的转换效率；但是过小电压差可能会造成整个反馈环路的相位裕度、电源抑制比很差，所以在系统设计时要折中考虑。
（7） The line regulation of LDO is defined as the variation ratio of output to input voltage when input voltage changes under constant load.
LDO的线性调整率定义为在负载保持恒定的情况下，输入电压发生变化时，输出电压变化量与输入电压变化量的比值。
（8） The definition of PSRR is similar to line regulation,but there is an essential difference.The line regulation represents a large signal,DC characteristic,and a smallsignal and AC characteristic is expressed by PSRR.
电源抑制比的定义与线性调整率虽然相似，但是有本质的区别，线性调整率表示的是大信号、直流特性，而电源抑制比表示的小信号、交流特性。
（9） Usually,the condition of ensuring stability is that the phase margin of openloop characteristic is greater than 45 degrees.Considering the transient characteristics,overshoot and other properties,the 60 degree is an ideal value.
通常情况下，确保负反馈系统稳定的条件是其开环特性的相位裕度大于45°，考虑到瞬态建立特性、过冲以及其他性能，相位裕度达到60°是一个比较理想的值。
（10） In order to improve the accuracy and transient characteristics of LDO,a buffer is usually inserted between error amplifier and adjusting transistor.
为了提高LDO的精度和瞬态特性，一般在误差放大器和调整晶体管之间插入一个缓冲器。