目录 PART ONE SOLIDSTATE ELECTRONICS AND DEVICES CHAPTER 1 INTRODUCTION TO ELECTRONICS 3 1.1A Brief History of Electronics: From Vacuum Tubes to GigaScale Integration6 1.2Classification of Electronic Signals10 1.2.1Digital Signals10 1.2.2Analog Signals11 1.2.3A/D and D/A Converters—Bridging the Analog and Digital Domains12 1.3Notational Conventions14 1.4ProblemSolving Approach15 1.5Important Concepts from Circuit Theory17 1.5.1Voltage and Current Division17 1.5.2Thévenin and Norton Circuit Representations18 1.6Frequency Spectrum of Electronic Signals23 1.7Amplifiers24 1.7.1Ideal Operational Amplifiers25 1.7.2Amplifier Frequency Response28 1.8Element Variations in Circuit Design28 1.8.1Mathematical Modeling of Tolerances29 1.8.2WorstCase Analysis29 1.8.3Monte Carlo Analysis31 1.8.4Temperature Coefficients34 1.9Numeric Precision36 Summary36 Key Terms37 References38 Additional Reading38 Problems39 CHAPTER 2 SOLIDSTATE ELECTRONICS46 2.1SolidState Electronic Materials50 2.2Covalent Bond Model51 2.3Drift Currents and Mobility in Semiconductors54 2.3.1Drift Currents54 2.3.2Mobility55 2.3.3Velocity Saturation55 2.4Resistivity of Intrinsic Silicon56 2.5Impurities in Semiconductors57 2.5.1Donor Impurities in Silicon58 2.5.2Acceptor Impurities in Silicon58 2.6Electron and Hole Concentrations in Doped Semiconductors58 2.6.1nType Material(ND >NA)59 2.6.2pType Material(NA>ND )60 2.7Mobility and Resistivity in Doped Semiconductors61 2.8Diffusion Currents65 2.9Total Current66 2.10Energy Band Model67 2.10.1Electron—Hole Pair Generation in an Intrinsic Semiconductor67 2.10.2Energy Band Model for a Doped Semiconductor68 2.10.3Compensated Semiconductors68 2.11Overview of Integrated Circuit Fabrication70 Summary73 Key Terms74 References75 Additional Reading75 Problems75 CHAPTER 3 SOLIDSTATE DIODES AND DIODE CIRCUITS81 3.1The pn Junction Diode84 3.1.1pn Junction Electrostatics84 3.1.2Internal Diode Currents88 3.2The iv Characteristics of the Diode89 3.3The Diode Equation: A Mathematical Model for the Diode91 3.4Diode Characteristics under Reverse, Zero, and Forward Bias94 3.4.1Reverse Bias94 3.4.2Zero Bias94 3.4.3Forward Bias95 3.5Diode Temperature Coefficient97 3.6Diodes under Reverse Bias97 3.6.1Saturation Current in Real Diodes98 3.6.2Reverse Breakdown100 3.6.3Diode Model for the Breakdown Region101 3.7pn Junction Capacitance101 3.7.1Reverse Bias101 3.7.2Forward Bias102 3.8Schottky Barrier Diode104 3.9Diode SPICE Model and Layout104 3.9.1Diode Layout105 3.10Diode Circuit Analysis106 3.10.1LoadLine Analysis107 3.10.2Analysis Using the Mathematical Model for the Diode108 3.10.3The Ideal Diode Model112 3.10.4Constant Voltage Drop Model114 3.10.5Model Comparison and Discussion115 3.11MultipleDiode Circuits116 3.12Analysis of Diodes Operating in the Breakdown Region119 3.12.1LoadLine Analysis119 3.12.2Analysis with the Piecewise Linear Model119 3.12.3Voltage Regulation120 3.12.4Analysis Including Zener Resistance121 3.12.5Line and Load Regulation122 3.13HalfWave Rectifier Circuits123 3.13.1HalfWave Rectifier with Resistor Load123 3.13.2Rectifier Filter Capacitor124 3.13.3HalfWave Rectifier with RC Load125 3.13.4Ripple Voltage and Conduction Interval126 3.13.5Diode Current128 3.13.6Surge Current130 3.13.7PeakInverseVoltage (PIV) Rating130 3.13.8Diode Power Dissipation130 3.13.9HalfWave Rectifier with Negative Output Voltage131 3.14FullWave Rectifier Circuits133 3.14.1FullWave Rectifier with Negative Output Voltage134 3.15FullWave Bridge Rectification134 3.16Rectifier Comparison and Design Tradeoffs135 3.17Dynamic Switching Behavior of the Diode139 3.18Photo Diodes, Solar Cells, and LightEmitting Diodes140 3.18.1Photo Diodes and Photodetectors140 3.18.2Power Generation from Solar Cells141 3.18.3LightEmitting Diodes (LEDs)142 Summary143 Key Terms144 Reference145 Additional Reading145 Problems145 CHAPTER 4 BIPOLAR JUNCTION TRANSISTORS158 4.1Physical Structure of the Bipolar Transistor161 4.2The Transport Model for the npn Transistor162 4.2.1Forward Characteristics163 4.2.2Reverse Characteristics165 4.2.3The Complete Transport Model Equations for Arbitrary Bias Conditions166 4.3The pnp Transistor168 4.4Equivalent Circuit Representations for the Transport Models170 4.5The iv Characteristics of the Bipolar Transistor171 4.5.1Output Characteristics171 4.5.2Transfer Characteristics172 4.6The Operating Regions of the Bipolar Transistor173 4.7Transport Model Simplifications174 4.7.1Simplified Model for the Cutoff Region174 4.7.2Model Simplifications for the ForwardActive Region176 4.7.3Diodes in Bipolar Integrated Circuits182 4.7.4Simplified Model for the ReverseActive Region183 4.7.5Modeling Operation in the Saturation Region186 4.8Nonideal Behavior of the Bipolar Transistor189 4.8.1Junction Breakdown Voltages189 4.8.2MinorityCarrier Transport in the Base Region189 4.8.3Base Transit Time190 4.8.4Diffusion Capacitance192 4.8.5Frequency Dependence of the CommonEmitter Current Gain193 4.8.6The Early Effect and Early Voltage193 4.8.7Modeling the Early Effect194 4.8.8Origin of the Early Effect194 4.9Transconductance195 4.10Bipolar Technology and SPICE Model196 4.10.1Qualitative Description196 4.10.2SPICE Model Equations197 4.10.3HighPerformance Bipolar Transistors199 4.11Practical Bias Circuits for the BJT199 4.11.1FourResistor Bias Network201 4.11.2Design Objectives for the FourResistor Bias Network203 4.11.3Iterative Analysis of the FourResistor Bias Circuit207 4.12Tolerances in Bias Circuits208 4.12.1WorstCase Analysis208 4.12.2Monte Carlo Analysis210 Summary213 Key Terms215 References216 Additional Readings216 Problems216 CHAPTER 5 FIELDEFFECT TRANSISTORS228 5.1Characteristics of the MOS Capacitor231 5.1.1Accumulation Region232 5.1.2Depletion Region233 5.1.3Inversion Region233 5.2The NMOS Transistor233 5.2.1Qualitative iv Behavior of the NMOS Transistor234 5.2.2Triode Region Characteristics of the NMOS Transistor235 5.2.3On Resistance238 5.2.4Transconductance239 5.2.5Saturation of the iv Characteristics240 5.2.6Mathematical Model in the Saturation (PinchOff)Region241 5.2.7Transconductance in Saturation242 5.2.8ChannelLength Modulation242 5.2.9Transfer Characteristics and DepletionMode MOSFETs243 5.2.10Body Effect or Substrate Sensitivity245 5.3PMOS Transistors246 5.4MOSFET Circuit Symbols248 5.5MOS Transistor Symmetry249 5.5.1The OneTransistor Dram Cell 249 5.5.2Data Storage in the 1T Cell 250 5.5.3Reading Data from the 1T Cell 251 5.6CMOS Technology 254 5.6.1CMOS Voltage Transfer Characteristics 256 5.7CMOS Latchup258 5.8Capacitances in MOS Transistors260 5.8.1NMOS Transistor Capacitances in the Triode Region260 5.8.2Capacitances in the Saturation Region263 5.8.3Capacitances in Cutoff263 5.9MOSFET Modeling in SPICE263 5.10MOS Transistor Scaling265 5.10.1Drain Current266 5.10.2Gate Capacitance266 5.10.3Circuit and Power Densities266 5.10.4PowerDelay Product267 5.10.5Cutoff Frequency267 5.10.6High Field Limitations268 5.10.7The Unified MOS Transistor Model Including High Field Limitations269 5.10.8Subthreshold Conduction270 5.11All Region Modeling271 5.11.1Interpolation Model271 5.11.2Interpolation Model in the Saturation Region271 5.11.3Transconductance Efficiency272 5.12MOS Transistor Fabrication and Layout Design Rules274 5.12.1Minimum Feature Size and Alignment Tolerance274 5.12.2MOS Transistor Layout275 5.12.3CMOS Inverter Layout277 5.13Advanced CMOS Technologies278 5.14Biasing the NMOS FieldEffect Transistor281 5.14.1Why Do We Need Bias?281 5.14.2FourResistor Biasing283 5.14.3Constant GateSource Voltage Bias287 5.14.4Graphical Analysis for the QPoint287 5.14.5Analysis Including Body Effect288 5.14.6Analysis Using the Unified Model290 5.14.7NMOS Circuit Analysis Comparisons292 5.14.8TwoResistor Bias292 5.15Biasing the PMOS FieldEffect Transistor292 5.16Biasing the CMOS Inverter as an Amplifier 295 5.17The CMOS Transmission Gate296 5.18The Junction FieldEffect Transistor (JFET)298 5.18.1The JFET with Bias Applied299 5.18.2JFET Channel with DrainSource Bias299 5.18.3 nChannel JFET iv Characteristics301 5.18.4The pChannel JFET302 5.18.5Circuit Symbols and JFET Model Summary302 5.18.6JFET Capacitances303 5.19JFET Modeling in SPICE304 5.20Biasing the JFET and DepletionMode MOSFET305 Summary307 Key Terms309 References310 Additional Readings311 Problems312 PART TWO ANALOG ELECTRONICS CHAPTER 6 INTRODUCTION TO AMPLIFIERS331 6.1An Example of an Analog Electronic System334 6.2Amplification335 6.2.1Voltage Gain336 6.2.2Current Gain337 6.2.3Power Gain337 6.2.4Location of the Amplifier337 6.2.5The Decibel Scale338 6.3TwoPort Models for Amplifiers341 6.3.1The gParameters341 6.4Mismatched Source and Load Resistances345 6.5The Differential Amplifier348 6.5.1Differential Amplifier Voltage Transfer Characteristic349 6.5.2Voltage Gain349 6.6Distortion in Amplifiers351 6.7Differential Amplifier Model352 6.8Amplifier Frequency Response354 6.8.1Bode Plots354 6.8.2The LowPass Amplifier355 6.8.3The HighPass Amplifier358 6.8.4BandPass Amplifiers361 Summary364 Key Terms365 References365 Additional Reading365 Problems365 CHAPTER 7 THE TRANSISTOR AS AN AMPLIFIER374 7.1The Transistor as an Amplifier377 7.1.1The BJT Amplifier378 7.1.2The MOSFET Amplifier379 7.2Coupling and Bypass Capacitors380 7.3Circuit Analysis Using dc and ac Equivalent Circuits382 7.3.1Menu for dc and ac Analysis382 7.4Introduction to SmallSignal Modeling386 7.4.1Graphical Interpretation of the Small Signal Behavior of the Diode386 7.4.2SmallSignal Modeling of the Diode387 7.5SmallSignal Models for Bipolar Junction Transistors389 7.5.1The HybridPi Model391 7.5.2Graphical Interpretation of the Transconductance392 7.5.3SmallSignal Current Gain392 7.5.4The Intrinsic Voltage Gain of the BJT393 7.5.5Equivalent Forms of the SmallSignal Model394 7.5.6Simplified HybridPi Model395 7.5.7Definition of a Small Signal for the Bipolar Transistor395 7.5.8SmallSignal Model for the pnp Transistor397 7.5.9ac Analysis versus Transient Analysis in SPICE398 7.6The CommonEmitter (CE) Amplifier398 7.6.1Terminal Voltage Gain398 7.6.2Input Resistance400 7.6.3Signal Source Voltage Gain400 7.7Important Limits and Model Simplifications400 7.7.1A Design Guide for the CommonEmitter Amplifier401 7.7.2Upper Bound on the CommonEmitter Gain402 7.7.3SmallSignal Limit for the Common Emitter Amplifier402 7.8SmallSignal Models for FieldEffect Transistors405 7.8.1SmallSignal Model for the MOSFET405 7.8.2Intrinsic Voltage Gain of the MOSFET407 7.8.3Definition of SmallSignal Operation for the MOSFET408 7.8.4Body Effect in the FourTerminal MOSFET409 7.8.5SmallSignal Model for the PMOS Transistor410 7.8.6SmallSignal Model for MOS Transistors in Weak Inversion411 7.8.7 SmallSignal Model for the Junction FieldEffect Transistor411 7.9Summary and Comparison of the SmallSignal Models of the BJT and FET412 7.10The CommonSource(CS) Amplifier415 7.10.1CommonSource Terminal Voltage Gain416 7.10.2Signal Source Voltage Gain for the CommonSource Amplifier416 7.10.3A Design Guide for the Common Source Amplifier417 7.10.4SmallSignal Limit for the Common Source Amplifier418 7.10.5Input Resistances of the CommonEmitter and CommonSource Amplifiers420 7.10.6CommonEmitter and CommonSource Output Resistances422 7.10.7Comparison of the Three Amplifier Examples428 7.11CommonEmitter and CommonSource Amplifier Summary429 7.11.1Guidelines for Neglecting the Transistor Output Resistance429 7.12Amplifier Power and Signal Range430 7.12.1Power Dissipation430 7.12.2Signal Range431 Summary434 Key Terms435 Reference435 Problems436 CHAPTER 8 TRANSISTOR AMPLIFIER BUILDING BLOCKS449 8.1Amplifier Classification452 8.1.1Signal Injection and Extraction—the BJT452 8.1.2Signal Injection and Extraction—the FET453 8.1.3CommonEmitter (CE) and Common Source (CS)Amplifiers454 8.1.4CommonCollector (CC) and Common Drain (CD)Topologies455 8.1.5CommonBase (CB) and Common Gate (CG)Amplifiers457 8.1.6SmallSignal Model Review458 8.2Inverting Amplifiers—CommonEmitter and CommonSource Circuits458 8.2.1The CommonEmitter (CE)Amplifier458 8.2.2CommonEmitter Example Comparison470 8.2.3The CommonSource Amplifier471 8.2.4SmallSignal Limit for the Common Source Amplifier474 8.2.5CommonEmitter and CommonSource Amplifier Characteristics478 8.2.6CE/CS Amplifier Summary479 8.2.7Equivalent Transistor Representation of the Generalized CE/CS Transistor479 8.3Follower Circuits—CommonCollector and CommonDrain Amplifiers480 8.3.1Terminal Voltage Gain482 8.3.2Input Resistance483 8.3.3Signal Source Voltage Gain483 8.3.4Follower Signal Range484 8.3.5Follower Output Resistance484 8.3.6Current Gain486 8.3.7CC/CD Amplifier Summary486 8.4Noninverting Amplifiers—CommonBase and CommonGate Circuits490 8.4.1Terminal Voltage Gain and Input Resistance492 8.4.2Signal Source Voltage Gain493 8.4.3Input Signal Range494 8.4.4Resistance at the Collector and Drain Terminals494 8.4.5Current Gain495 8.4.6Overall Input and Output Resistances for the Noninverting Amplifiers495 8.4.7CB/CG Amplifier Summary499 8.5Amplifier Prototype Review and Comparison500 8.5.1The BJT Amplifiers500 8.5.2The FET Amplifiers502 8.6CommonSource Amplifiers Using MOS Transistor Loads505 8.6.1Voltage Gain Estimate505 8.6.2Detailed Analysis506 8.6.3Alternative Loads507 8.6.4Input and Output Resistances508 8.7Coupling and Bypass Capacitor Design511 8.7.1CommonEmitter and Common Source Amplifiers511 8.7.2CommonCollector and Common Drain Amplifiers515 8.7.3CommonBase and CommonGate Amplifiers518 8.7.4Setting Lower Cutoff Frequency fL521 8.8Amplifier Design Examples522 8.8.1Monte Carlo Evaluation of the Common Base Amplifier Design531 8.9Multistage acCoupled Amplifiers536 8.9.1A ThreeStage acCoupled Amplifier537 8.9.2Voltage Gain539 8.9.3Input Resistance540 8.9.4Signal Source Voltage Gain540 8.9.5Output Resistance541 8.9.6Current and Power Gain542 8.9.7Input Signal Range542 8.9.8Estimating the Lower Cutoff Frequency of the Multistage Amplifier546 8.10Introduction to dcCoupled Amplifiers 546 8.10.1A dcCoupled ThreeStage Amplifier 548 8.10.2Two Transistor dcCoupled Amplifiers549 Summary551 Key Terms553 Additional Reading553 Problems553 CHAPTER 9 AMPLIFIER FREQUENCY RESPONSE571 9.1Amplifier Frequency Response574 9.1.1LowFrequency Response575 9.1.2Estimating ωL in the Absence of a Dominant Pole575 9.1.3HighFrequency Response578 9.1.4Estimating ωH in the Absence of a Dominant Pole578 9.2Direct Determination of the LowFrequency Poles and Zeros—the CommonSource Amplifier579 9.3Estimation of ωL Using the ShortCircuit Time Constant Method584 9.3.1Estimate of ωL for the Common Emitter Amplifier585 9.3.2Estimate of ωL for the CommonSource Amplifier589 9.3.3Estimate of ωL for the CommonBase Amplifier590 9.3.4Estimate of ωL for the CommonGate Amplifier591 9.3.5Estimate of ωL for the Common Collector Amplifier592 9.3.6Estimate of ωL for the CommonDrain Amplifier592 9.4Transistor Models at High Frequencies593 9.4.1FrequencyDependent HybridPi Model for the Bipolar Transistor593 9.4.2Modeling Cπ and Cμ in SPICE594 9.4.3UnityGain Frequency fT594 9.4.4HighFrequency Model for the FET597 9.4.5Modeling CGS and CGD in SPICE598 9.4.6Channel Length Dependence of fT598 9.4.7Limitations of the HighFrequency Models600 9.5Base and Gate Resistances in the SmallSignal Models600 9.5.1Effect of Base and Gate Resistances on Midband Amplifiers601 9.6HighFrequency CommonEmitter and Common Source Amplifier Analysis602 9.6.1The Miller Effect604 9.6.2CommonEmitter and CommonSource Amplifier HighFrequency Response606 9.6.3Direct Analysis of the Common Emitter Transfer Characteristic608 9.6.4Poles of the CommonEmitter Amplifier609 9.6.5Dominant Pole for the CommonSource Amplifier612 9.6.6Estimation of ωH Using the Open Circuit TimeConstant Method614 9.6.7CommonSource Amplifier with Source Degeneration Resistance615 9.6.8Poles of the CommonEmitter with Emitter Degeneration Resistance617 9.7CommonBase and CommonGate Amplifier HighFrequency Response620 9.8CommonCollector and CommonDrain Amplifier HighFrequency Response622 9.9SingleStage Amplifier HighFrequency Response Summary625 9.9.1Amplifier GainBandwidth (GBW) Limitations625 9.10Frequency Response of Multistage Amplifiers626 9.10.1Differential Amplifier626 9.10.2The CommonCollector/Common Base Cascade628 9.10.3HighFrequency Response of the Cascode Amplifier629 9.10.4Cutoff Frequency for the Current Mirror630 9.10.5ThreeStage Amplifier Example631 9.11Introduction to Radio Frequency Circuits639 9.11.1Radio Frequency Amplifiers640 9.11.2The ShuntPeaked Amplifier640 9.11.3SingleTuned Amplifier642 9.11.4Use of a Tapped Inductor—the Auto Transformer644 9.11.5Multiple Tuned Circuits—Synchronous and Stagger Tuning646 9.11.6CommonSource Amplifier with Inductive Degeneration647 9.12Mixers and Balanced Modulators651 9.12.1Introduction to Mixer Operation651 9.12.2A SingleBalanced Mixer652 9.12.3The Differential Pair as a Single Balanced Mixer653 9.12.4A DoubleBalanced Mixer655 9.12.5The Jones Mixer—a Double Balanced Mixer/Modulator657 Summary661 Key Terms662 References662 Problems663 PART THREE OPERATIONAL AMPLIFIERS AND FEEDBACK CHAPTER 10 IDEAL OPERATIONAL AMPLIFIERS679 10.1Ideal Differential and Operational Amplifiers681 10.1.1Assumptions for Ideal Operational Amplifier Analysis682 10.2Analysis of Circuits Containing Ideal Operational Amplifiers682 10.2.1The Inverting Amplifier683 10.2.2The Transresistance Amplifier—a CurrenttoVoltage Converter686 10.2.3The Noninverting Amplifier688 10.2.4The UnityGain Buffer, or Voltage Follower690 10.2.5The Summing Amplifier693 10.2.6The Difference Amplifier695 10.3Frequency Dependent Feedback697 10.3.1An Active LowPass Filter698 10.3.2An Active HighPass Filter701 10.3.3The Integrator702 10.3.4The Differentiator706 Summary706 Key Terms707 References708 Additional Reading708 Problems708 CHAPTER 11 NONIDEAL OPERATIONAL AMPLIFIERS AND FEEDBACK AMPLIFIER STABILITY715 11.1Classic Feedback Systems718 11.1.1ClosedLoop Gain Analysis719 11.1.2Gain Error719 11.2Analysis of Circuits Containing Nonideal Operational Amplifiers720 11.2.1Finite OpenLoop Gain720 11.2.2Nonzero Output Resistance723 11.2.3Finite Input Resistance727 11.2.4Summary of Nonideal Inverting and Noninverting Amplifiers731 11.3Series and Shunt Feedback Circuits732 11.3.1Feedback Amplifier Categories732 11.3.2Voltage Amplifiers—SeriesShunt Feedback733 11.3.3Transimpedance Amplifiers— ShuntShunt Feedback733 11.3.4Current Amplifiers—ShuntSeries Feedback733 11.3.5Transconductance Amplifiers— SeriesSeries Feedback733 11.4Unified Approach to Feedback Amplifier Gain Calculation733 11.4.1ClosedLoop Gain Analysis734 11.4.2Resistance Calculations Using Blackman’s Theorem734 11.5SeriesShunt Feedback—Voltage Amplifiers734 11.5.1ClosedLoop Gain Calculation735 11.5.2Input Resistance Calculations735 11.5.3Output Resistance Calculations736 11.5.4SeriesShunt Feedback Amplifier Summary737 11.6ShuntShunt Feedback—Transresistance Amplifiers741 11.6.1ClosedLoop Gain Calculation741 11.6.2Input Resistance Calculations742 11.6.3Output Resistance Calculations742 11.6.4ShuntShunt Feedback Amplifier Summary743 11.7SeriesSeries Feedback—Transconductance Amplifiers746 11.7.1ClosedLoop Gain Calculation747 11.7.2Input Resistance Calculation747 11.7.3Output Resistance Calculation748 11.7.4SeriesSeries Feedback Amplifier Summary748 11.8ShuntSeries Feedback—Current Amplifiers750 11.8.1ClosedLoop Gain Calculation751 11.8.2Input Resistance Calculation751 11.8.3Output Resistance Calculation752 11.8.4ShuntSeries Feedback Amplifier Summary752 11.9Finding the Loop Gain Using Successive Voltage and Current Injection755 11.9.1Simplifications758 11.10Distortion Reduction Through the Use of Feedback758 11.11DC Error Sources and Output Range Limitations759 11.11.1InputOffset Voltage759 11.11.2OffsetVoltage Adjustment761 11.11.3InputBias and Offset Currents762 11.11.4Output Voltage and Current Limits764 11.12CommonMode Rejection and Input Resistance767 11.12.1Finite CommonMode Rejection Ratio767 11.12.2Why Is CMRR Important?768 11.12.3VoltageFollower Gain Error due to CMRR771 11.12.4CommonMode Input Resistance774 11.12.5An Alternate Interpretation of CMRR775 11.12.6Power Supply Rejection Ratio775 11.13Frequency Response and Bandwidth of Operational Amplifiers777 11.13.1Frequency Response of the Noninverting Amplifier779 11.13.2Inverting Amplifier Frequency Response782 11.13.3Using Feedback to Control Frequency Response784 11.13.4LargeSignal Limitations—Slew Rate and FullPower Bandwidth786 11.13.5Macro Model for Operational Amplifier Frequency Response787 11.13.6Complete Op Amp Macro Models in SPICE788 11.13.7Examples of Commercial General Purpose Operational Amplifiers788 11.14Stability of Feedback Amplifiers789 11.14.1The Nyquist Plot789 11.14.2FirstOrder Systems790 11.14.3SecondOrder Systems and Phase Margin791 11.14.4Step Response and Phase Margin792 11.14.5ThirdOrder Systems and Gain Margin795 11.14.6Determining Stability from the Bode Plot796 Summary800 Key Terms802 References802 Problems803 CHAPTER 12 OPERATIONAL AMPLIFIER APPLICATIONS817 12.1Cascaded Amplifiers820 12.1.1TwoPort Representations820 12.1.2Amplifier Terminology Review822 12.1.3Frequency Response of Cascaded Amplifiers825 12.2The Instrumentation Amplifier833 12.3Active Filters836 12.3.1LowPass Filter836 12.3.2A HighPass Filter with Gain840 12.3.3BandPass Filter842 12.3.4Sensitivity844 12.3.5Magnitude and Frequency Scaling845 12.4SwitchedCapacitor Circuits846 12.4.1A SwitchedCapacitor Integrator846 12.4.2Noninverting SC Integrator848 12.4.3SwitchedCapacitor Filters850 12.5DigitaltoAnalog Conversion853 12.5.1D/A Converter Fundamentals853 12.5.2D/A Converter Errors854 12.5.3DigitaltoAnalog Converter Circuits856 12.6AnalogtoDigital Conversion860 12.6.1A/D Converter Fundamentals861 12.6.2AnalogtoDigital Converter Errors862 12.6.3Basic A/D Conversion Techniques863 12.7Oscillators874 12.7.1The Barkhausen Criteria for Oscillation874 12.7.2Oscillators Employing Frequency Selective RC Networks875 12.8Nonlinear Circuit Applications879 12.8.1A Precision HalfWave Rectifier879 12.8.2Nonsaturating PrecisionRectifier Circuit880 12.9Circuits Using Positive Feedback882 12.9.1The Comparator and Schmitt Trigger882 12.9.2The Astable Multivibrator884 12.9.3The Monostable Multivibrator or One Shot885 Summary889 Key Terms891 Additional Reading892 Problems892 CHAPTER 13 DIFFERENTIAL AMPLIFIERS AND OPERATIONAL AMPLIFIER DESIGN906 13.1Differential Amplifiers909 13.1.1Bipolar and MOS Differential Amplifiers909 13.1.2dc Analysis of the Bipolar Differential Amplifier910 13.1.3Transfer Characteristic for the Bipolar Differential Amplifier912 13.1.4ac Analysis of the Bipolar Differential Amplifier913 13.1.5DifferentialMode Gain and Input and Output Resistances914 13.1.6CommonMode Gain and Input Resistance916 13.1.7CommonMode Rejection Ratio (CMRR)918 13.1.8Analysis Using Differential—and CommonMode HalfCircuits919 13.1.9Biasing with Electronic Current Sources922 13.1.10Modeling the Electronic Current Source in SPICE923 13.1.11dc Analysis of the MOSFET Differential Amplifier923 13.1.12DifferentialMode Input Signals926 13.1.13SmallSignal Transfer Characteristic for the MOS Differential Amplifier927 13.1.14CommonMode Input Signals927 13.1.15Model for Differential Pairs928 13.2Evolution to Basic Operational Amplifiers932 13.2.1A TwoStage Prototype for an Operational Amplifier933 13.2.2Improving the Op Amp Voltage Gain938 13.2.3Darlington Pairs939 13.2.4Output Resistance Reduction940 13.2.5A CMOS Operational Amplifier Prototype944 13.2.6BiCMOS Amplifiers946 13.2.7All Transistor Implementations946 13.3Output Stages948 13.3.1The Source Follower—a ClassA Output Stage948 13.3.2Efficiency of ClassA Amplifiers949 13.3.3ClassB PushPull Output Stage950 13.3.4ClassAB Amplifiers952 13.3.5ClassAB Output Stages for Operational Amplifiers953 13.3.6ShortCircuit Protection953 13.3.7Transformer Coupling955 13.4Electronic Current Sources958 13.4.1SingleTransistor Current Sources959 13.4.2Figure of Merit for Current Sources959 13.4.3Higher Output Resistance Sources960 13.4.4Current Source Design Examples961 Summary969 Key Terms970 References970 Additional Reading971 Problems971 CHAPTER 14 ANALOG INTEGRATED CIRCUIT DESIGN TECHNIQUES989 14.1Circuit Element Matching992 14.2Current Mirrors993 14.2.1dc Analysis of the MOS Transistor Current Mirror994 14.2.2Changing the MOS Mirror Ratio996 14.2.3dc Analysis of the Bipolar Transistor Current Mirror997 14.2.4Altering the BJT Current Mirror Ratio999 14.2.5Multiple Current Sources1000 14.2.6Buffered Current Mirror1001 14.2.7Output Resistance of the Current Mirrors1002 14.2.8TwoPort Model for the Current Mirror1003 14.2.9The Widlar Current Source1005 14.2.10The MOS Version of the Widlar Source1008 14.2.11MOS Widlar Source in Weak Inversion 1008 14.3HighOutputResistance Current Mirrors1009 14.3.1The Wilson Current Sources1010 14.3.2Output Resistance of the Wilson Source1011 14.3.3Cascode Current Sources1012 14.3.4Output Resistance of the Cascode Sources1013 14.3.5Regulated Cascode Current Source1014 14.3.6Current Mirror Summary1015 14.4Reference Current Generation1018 14.5SupplyIndependent Biasing1019 14.5.1A VBE Based Reference1019 14.5.2The Widlar Source1019 14.5.3PowerSupplyIndependent Bias Cell1020 14.5.4A SupplyIndependent MOS Reference Cell1021 14.6The Bandgap Reference1023 14.7The Current Mirror as an Active Load1027 14.7.1CMOS Differential Amplifier with Active Load1027 14.7.2Bipolar Differential Amplifier with Active Load1034 14.8Active Loads in Operational Amplifiers1038 14.8.1CMOS OpAmp Voltage Gain1038 14.8.2dc Design Considerations1039 14.8.3Bipolar Operational Amplifiers1041 14.8.4Input Stage Breakdown1042 14.9The μA741 Operational Amplifier1043 14.9.1Overall Circuit Operation1043 14.9.2Bias Circuitry1044 14.9.3dc Analysis of the 741 Input Stage1045 14.9.4ac Analysis of the 741 Input Stage1048 14.9.5Voltage Gain of the Complete Amplifier1049 14.9.6The 741 Output Stage1053 14.9.7Output Resistance1055 14.9.8ShortCircuit Protection1055 14.9.9Summary of the μA741 Operational Amplifier Characteristics1055 14.10The Gilbert Analog Multiplier1056 Summary1058 Key Terms1059 References1060 Additional Readings1060 Problems1060 CHAPTER 15 TRANSISTOR FEEDBACK AMPLIFIERS AND OSCILLATORS1077 15.1Basic Feedback System Review1080 15.1.1ClosedLoop Gain1080 15.1.2ClosedLoop Impedances1081 15.1.3Feedback Effects1081 15.2Feedback Amplifier Analysis at Midband1083 15.2.1ClosedLoop Gain1083 15.2.2Input Resistance1084 15.2.3Output Resistance1084 15.2.4Offset Voltage Calculation1085 15.3Feedback Amplifier Circuit Examples1086 15.3.1SeriesShunt Feedback— Voltage Amplifiers1086 15.3.2Differential Input SeriesShunt Voltage Amplifier1091 15.3.3ShuntShunt Feedback— Transresistance Amplifiers1094 15.3.4SeriesSeries Feedback— Transconductance Amplifiers1100 15.3.5ShuntSeries Feedback— Current Amplifiers1103 15.4Review of Feedback Amplifier Stability1106 15.4.1ClosedLoop Response of the Uncompensated Amplifier1107 15.4.2Phase Margin1108 15.4.3HigherOrder Effects1112 15.4.4Response of the Compensated Amplifier1113 15.4.5SmallSignal Limitations1115 15.5SinglePole Operational Amplifier Compensation1115 15.5.1ThreeStage OpAmp Analysis1116 15.5.2Transmission Zeros in FET Op Amps1118 15.5.3Bipolar Amplifier Compensation1119 15.5.4Slew Rate of the Operational Amplifier1120 15.5.5Relationships between Slew Rate and GainBandwidth Product1121 15.6HighFrequency Oscillators1130 15.6.1The Colpitts Oscillator1131 15.6.2The Hartley Oscillator1132 15.6.3Amplitude Stabilization in LC Oscillators1133 15.6.4Negative Resistance in Oscillators1133 15.6.5Negative Gm Oscillator1134 15.6.6Crystal Oscillators1136 15.6.7Ring Oscillators 1139 15.6.8Positive Feedback and Latchup 1140 Summary1143 Key Terms1145 Additional Readings1145 Problems1145 APPENDICES1159 AStandard Discrete Component Values1159 BSolidState Device Models and SPICE Simulation Parameters1162 CTwoPort Review (Section 6.3)1167 DPhysical Constants and Transistor Model Summary1170 第一部分 固态电子学与器件 第1章 电子学简介 1.1电子学发展简史： 从真空管到吉规模 集成电路 1.2电信号的分类 1.2.1数字信号 1.2.2模拟信号 1.2.3A/D和D/A转换器——模拟与数字 信号的桥梁 1.3符号约定 1.4问题求解的方法 1.5电路理论的主要概念 1.5.1分压和分流 1.5.2戴维南定理和诺顿 定理 1.6电信号的频谱 1.7放大器 1.7.1理想运算放大器 1.7.2放大器频率响应 1.8电路设计中元件参数的变化 1.8.1容差的数学模型 1.8.2最差情况分析 1.8.3蒙特卡洛分析 1.8.4温度系数 1.9数值精度 小结 关键词 参考文献 补充阅读 习题 第2章 固态电子学 2.1固态电子材料 2.2共价键模型 2.3半导体中的漂移电流和迁移率 2.3.1漂移电流 2.3.2迁移率 2.3.3速度饱和 2.4本征硅的电阻率 2.5半导体中的杂质 2.5.1硅中的施主杂质 2.5.2硅中的受主杂质 2.6掺杂半导体中的电子和 空穴浓度 2.6.1n型材料(ND>NA) 2.6.2p型材料(NA>ND) 2.7掺杂半导体中的迁移率和电阻率 2.8扩散电流 2.9总电流 2.10能带模型 2.10.1本征半导体中电子空穴对 的产生 2.10.2掺杂半导体的能带 模型 2.10.3补偿半导体 2.11集成电路制造综述 小结 关键词 参考文献 补充阅读 习题 第3章 固态二极管和二极管电路 3.1pn结二极管 3.1.1pn结静电学 3.1.2二极管内部电流 3.2二极管的iv特性 3.3二极管方程： 二极管的数学模型 3.4二极管特性之反偏、零偏 和正偏 3.4.1反偏 3.4.2零偏 3.4.3正偏 3.5二极管的温度系数 3.6反偏下的二极管 3.6.1实际二极管的饱和电流 3.6.2反向击穿 3.6.3击穿区的二极管模型 3.7pn结电容 3.7.1反偏 3.7.2正偏 3.8肖特基势垒二极管 3.9二极管的SPICE模型及版图 3.9.1二极管的版图 3.10二极管电路分析 3.10.1负载线分析法 3.10.2二极管数学模型 分析法 3.10.3理想二极管模型 3.10.4恒压降模型 3.10.5模型比较与讨论 3.11多二极管电路 3.12二极管工作在击穿区域 的分析 3.12.1负载线分析 3.12.2分段线性模型 分析 3.12.3稳压器 3.12.4包含齐纳电阻的电路分析 3.12.5线性调整率和负载调整率 3.13半波整流电路 3.13.1带负载电阻的半波整流器 3.13.2整流滤波电容 3.13.3带RC负载的半波整流器 3.13.4纹波电压和导通期 3.13.5二极管电流 3.13.6浪涌电流 3.13.7额定峰值反向电压 3.13.8二极管功耗 3.13.9输出负电压的半波整流器 3.14全波整流电路 3.14.1输出负电压的全波 整流器 3.15全波桥式整流 3.16整流器的比较和折中设计 3.17二极管的动态开关行为 3.18光电二极管、太阳能电池和发光 二极管 3.18.1光电二极管和光探测器 3.18.2太阳能电池 3.18.3发光二极管(LED) 小结 关键词 参考文献 扩展阅读 习题 第4章 双极型晶体管 4.1双极型晶体管的物理结构 4.2npn晶体管的传输模型 4.2.1正向特性 4.2.2反向特性 4.2.3任意偏置条件下晶体管传输 模型方程 4.3pnp晶体管 4.4晶体管传输模型的 等效电路 4.5双极型晶体管的iv特性 4.5.1输出特性 4.5.2传输特性 4.6双极型晶体管的工作区 4.7传输模型的简化 4.7.1截止区的简化模型 4.7.2正向有源区的模型 简化 4.7.3双极型集成电路中的二极管 4.7.4反向有源区的简化模型 4.7.5饱和区模型 4.8双极型晶体管的非理想特性 4.8.1结击穿电压 4.8.2基区的少数载流子 传输 4.8.3基区传输时间 4.8.4扩散电容 4.8.5共发电流增益对频率的 依赖性 4.8.6Early效应和Early电压 4.8.7Early效应的建模 4.8.8Early效应的产生原因 4.9跨导 4.10双极型工艺与SPICE模型 4.10.1定量描述 4.10.2SPICE模型方程 4.10.3高性能双极型晶体管 4.11BJT的实际偏置电路 4.11.1四电阻偏置网络 4.11.2四电阻偏置网络的 设计目标 4.11.3四电阻偏置电路的 迭代分析 4.12偏置电路的容差 4.12.1最差情况分析 4.12.2蒙特卡洛分析 小结 关键词 参考文献 补充阅读 习题 第5章 场效应晶体管 5.1MOS电容特性 5.1.1积累区 5.1.2耗尽区 5.1.3反型区 5.2NMOS晶体管 5.2.1NMOS晶体管的iv特性的 定性描述 5.2.2NMOS晶体管的线性区 特性 5.2.3导通电阻 5.2.4跨导 5.2.5iv特性的饱和 5.2.6饱和(夹断)区的数学模型 5.2.7饱和跨导 5.2.8沟道长度调制 5.2.9传输特性及耗尽型 MOSFET 5.2.10体效应或衬底灵敏度 5.3PMOS晶体管 5.4MOSFET电路符号 5.5MOS晶体管对称性 5.5.1单晶体管Dram单元 5.5.21T细胞中的数据存储 5.5.3从1T细胞读取数据 5.6CMOS技术 5.6.1CMOS电压传输特性 5.7CMOS锁存器 5.8MOS晶体管电容 5.8.1NMOS晶体管的线性区 电容 5.8.2饱和区电容 5.8.3截止区电容 5.9SPICE中的MOSFET建模 5.10MOS晶体管的等比例缩放 5.10.1漏极电流 5.10.2栅极电容 5.10.3电流和功率密度 5.10.4功耗延迟积 5.10.5截止频率 5.10.6大电场限制 5.10.7包含高场限制的统一MOS 晶体管模型 5.10.8亚阈值导通 5.11全区域建模 5.11.1插值模型 5.11.2饱和区域的插值 模型 5.11.3跨导效率 5.12MOS晶体管的制造工艺及版图 设计规则 5.12.1最小特征尺寸和对准 容差 5.12.2MOS晶体管的版图 5.12.3CMOS逆变器布局 5.13先进CMOS技术 5.14NMOS场效应晶体管的偏置 5.14.1为什么需要偏置 5.14.2四电阻偏置 5.14.3恒定栅源电压偏置 5.14.4Q点的图形分析 5.14.5包含体效应的分析 5.14.6使用统一模型进行分析 5.14.7NMOS电路分析比较 5.14.8双电阻器偏置 5.15PMOS场效应晶体管的偏置 5.16偏置CMOS反相器作为放大器 5.17CMOS传输门 5.18结型场效应晶体管(JFET) 5.18.1偏压下的JFET 5.18.2漏源偏置下的JFET沟道 5.18.3n沟道JFET的iv特性 5.18.4p沟道JFET 5.18.5JFET的电路符号和 模型小结 5.18.6JFET电容 5.19JFET的SPICE模型 5.20JFET和耗尽型MOSFET的偏置 小结 关键词 参考文献 补充阅读 习题 第二部分 模拟电路 第6章 放大器简介 6.1模拟电子系统示例 6.2放大作用 6.2.1电压增益 6.2.2电流增益 6.2.3功率增益 6.2.4放大器的位置 6.2.5分贝 6.3放大器的二端口模型 6.3.1g参数 6.4源和负载电阻的失配 6.5差分放大器 6.5.1差分放大器的电压 传输特性 6.5.2电压增益 6.6放大器的失真 6.7差分放大器模型 6.8放大器的频率响应 6.8.1伯德图 6.8.2低通放大器 6.8.3高通放大器 6.8.4带通放大器 小结 关键词 参考文献 补充阅读 习题 第7章 晶体管放大器 7.1晶体管放大器 7.1.1BJT放大器 7.1.2MOSFET放大器 7.2耦合电容和旁路电容 7.3用直流和交流等效电路进行 电路分析 7.3.1直流和交流分析步骤 7.4小信号模型简介 7.4.1二极管小信号行为的 图形解释 7.4.2二极管的小信号建模 7.5双极型晶体管的小信号 模型 7.5.1混合π模型 7.5.2图解跨导 7.5.3小信号电流增益 7.5.4BJT的固有电压增益 7.5.5小信号模型的等效形式 7.5.6简化的混合π模型 7.5.7双极型晶体管的小信号 定义 7.5.8pnp晶体管的小信号 模型 7.5.9用SPICE进行交流分析和瞬态 分析的对比 7.6共射极放大器 7.6.1端电压增益 7.6.2输入电阻 7.6.3信号源电压增益 7.7重要限制及模型简化 7.7.1共射极放大器的 设计指导 7.7.2共射极增益的 上限 7.7.3共射极放大器的小信号 限制 7.8场效应晶体管的小信号模型 7.8.1MOSFET的小信号模型 7.8.2MOSFET的本征电压增益 7.8.3MOSFET小信号工作的 定义 7.8.4四端MOSFET中的 体效应 7.8.5PMOS晶体管的小信号模型 7.8.6弱反型区(亚阀值区)模式下MOS 管的小信号模型 7.8.7结型场效应晶体管的小信号 模型 7.9BJT和FET小信号模型的小结 与对比 7.10共源极放大器 7.10.1共源极端电压 增益 7.10.2共源极放大器的信号源 电压增益 7.10.3共源极放大器的 设计指导 7.10.4共源极放大器的小信号 限制 7.10.5共射极放大器和共源极放大器的 输入电阻 7.10.6共射极和共源极的输出 电阻 7.10.7三个放大器实例的 比较 7.11共射极放大器和共源极放大器 小结 7.11.1可忽略晶体管输出电阻的 指南 7.12放大器功率和信号范围 7.12.1功耗 7.12.2信号范围 小结 关键词 参考文献 习题 第8章 采用单晶体管放大器构 建块 8.1放大器分类 8.1.1双极型晶体管的信号注入和抽取 8.1.2场效应管的信号注入和抽取 8.1.3共发射极(CE)和共源极(CS) 放大器 8.1.4共集电极(CC)和共漏极(CD) 拓扑图 8.1.5共基极(CB)和共栅极(CG) 放大器 8.1.6小信号模型回顾 8.2反相放大器——共射极和共源极 放大器电路 8.2.1共发射极(CE)放大器 8.2.2共发射极实例的比较 8.2.3共源极放大器 8.2.4共源极放大器的小信号范围 8.2.5共发射极和共源极放大器 特性 8.2.6CE/CS放大器小结 8.2.7通用CE/CS晶体管的等效 晶体管表示 8.3跟随器电路——共集电极和共漏极 放大器 8.3.1端电压增益 8.3.2输入电阻 8.3.3信号源电压增益 8.3.4跟随器信号范围 8.3.5跟随器的输出电阻 8.3.6电流增益 8.3.7CC/CD放大器小结 8.4同相放大器——共基极和共栅极 电路 8.4.1端电压增益和输入 电阻 8.4.2信号源电压增益 8.4.3输入信号范围 8.4.4集电极和漏极端的 电阻 8.4.5电流增益 8.4.6同相放大器的总体输入和 输出电阻 8.4.7CB/CG放大器小结 8.5放大器原型回顾和 比较 8.5.1双极型晶体管放大器 8.5.2FET放大器 8.6采用MOS反相器的共源极 放大器 8.6.1电压增益估算 8.6.2详细分析 8.6.3其他可选负载 8.6.4输入和输出电阻 8.7耦合和旁路电容设计 8.7.1共发射极和共源极 放大器 8.7.2共集电极和共漏极 放大器 8.7.3共基极和共栅极 放大器 8.7.4设置下限截止频率fL 8.8放大器设计实例 8.8.1共基极放大器设计的 蒙特卡洛分析 8.9多级交流耦合放大器 8.9.1三级交流耦合放大器 8.9.2电压增益 8.9.3输入电阻 8.9.4信号源的电压增益 8.9.5输出电阻 8.9.6电流和功率增益 8.9.7输入信号范围 8.9.8估算多级放大器的截止频率 下限 8.10直流耦合放大器简介 8.10.1直流耦合三级放大器 8.10.2双晶体管直流耦合放大器 小结 关键词 扩展阅读 习题 第9章 放大器频率响应 9.1放大器频率响应 9.1.1低频响应 9.1.2缺少主极点情况下 估算ωL 9.1.3高频响应 9.1.4缺少主极点情况下 估算ωH 9.2直接确定低频极点和零点——共源 放大器 9.3用短路时间常数法估算 ωL的值 9.3.1估算共发射极放大器 的ωL 9.3.2估算共源极放大器 的ωL 9.3.3估算共基极放大器 的ωL 9.3.4估算共栅极放大器 的ωL 9.3.5估算共集电极放大器 的ωL 9.3.6估算共漏极放大器 的ωL 9.4高频晶体管模型 9.4.1双极型晶体管与频率相关的混合 π模型 9.4.2在SPICE中对Cπ和Cμ建模 9.4.3单位增益频率fT 9.4.4FET的高频模型 9.4.5运用SPICE为CGS和CGD建模 9.4.6fT与沟道长度的关系 9.4.7高频模型的局限性 9.5混合π模型中的基区 电阻 9.5.1基区电阻对中频放大器 的影响 9.6共发射极和共源极放大器的 高频响应 9.6.1密勒效应 9.6.2共发射极和共源极放大器的 高频响应 9.6.3共发射极放大器传输特性的 直接分析 9.6.4共发射极放大器的极点 9.6.5共源极放大器的 主极点 9.6.6用开路时间常数法 估算ωH 9.6.7包含源极衰减电阻的共源 放大器 9.6.8包含发射极衰减电阻的共发射极放大器 的极点 9.7共基极和共栅极放大器的 高频响应 9.8共集电极和共漏极放大器的 高频响应 9.9单级放大器高频响应 小结 9.9.1放大器的增益带宽 限制 9.10多级放大器的频率响应 9.10.1差分放大器 9.10.2共集电极/共基极 串联 9.10.3Cascode放大器的高频 响应 9.10.4电流镜的截止频率 9.10.5三级放大器实例 9.11射频电路介绍 9.11.1射频放大器 9.11.2并联峰化放大器 9.11.3单级调谐放大器 9.11.4抽头电感的运用——自耦 变压器 9.11.5多级调谐电路——同步调谐 和参差调谐 9.11.6包含衰减电感的共源 放大器 9.12混频器和平衡调制器 9.12.1混频器工作原理简介 9.12.2单平衡混频器 9.12.3差分对实现的单平衡 混频器 9.12.4双平衡混频器 9.12.5Jones混频器——双平衡混频器 /调制器 小结 关键词 参考文献 习题 第三部分 运算放大器和反馈 第10章 理想运算放大器 10.1理想差分放大器和运算放大器 10.1.1理想运算放大器分析中 的假设 10.2理想运算放大器电路 的分析 10.2.1反相放大器 10.2.2互阻放大器——电流/电压 转换器 10.2.3同相放大器 10.2.4单位增益缓冲器或电压 跟随器 10.2.5求和放大器 10.2.6差分放大器 10.3反馈放大器的频率特性 10.3.1有源低通滤波器 10.3.2有源高通滤波器 10.3.3积分器 10.3.4微分器 小结 关键词 参考文献 补充阅读 习题 第11章 非线性运算放大器和反馈放大器 的稳定性 11.1经典反馈系统 11.1.1闭环增益分析 11.1.2增益误差 11.2含有非理想运算放大器的 电路分析 11.2.1有限开环增益 11.2.2非零输出电阻 11.2.3有限输入电阻 11.2.4非理想反相和同相放大器 小结 11.3串联反馈和并联反馈电路 11.3.1反馈放大器类型 11.3.2电压放大器——电压串联 反馈 11.3.3跨阻放大器——电压并联 反馈 11.3.4电流放大器——电流并联 反馈 11.3.5跨导放大器——电流串联 反馈 11.4反馈放大器计算的统一 方法 11.4.1闭环增益分析 11.4.2利用Blackman理论计算 电阻 11.5电压串联反馈放大器——电压放大器 11.5.1闭环增益计算 11.5.2输入电阻计算 11.5.3输出电阻计算 11.5.4电压串联反馈放大器 小结 11.6电压并联反馈放大器——跨阻 放大器 11.6.1闭环增益分析 11.6.2输入电阻计算 11.6.3输出电阻计算 11.6.4电压并联反馈放大器 小结 11.7电流串联反馈放大器——跨导 放大器 11.7.1闭环增益计算 11.7.2输入电阻计算 11.7.3输出电阻计算 11.7.4电流串联反馈放大器 小结 11.8电流并联反馈放大器——电流放大器 11.8.1闭环增益计算 11.8.2输入电阻计算 11.8.3输出电阻计算 11.8.4电流并联反馈放大器 总结 11.9使用持续电压和电流注入法计算 回路增益 11.9.1简化 11.10利用反馈减小 失真 11.11直流误差源和输出摆幅 限制 11.11.1输入失调电压 11.11.2失调电压调节 11.11.3输入偏置电流和输入失调电流 11.11.4输出电压和电流限制 11.12共模抑制比和输入 电阻 11.12.1有限共模抑 制比 11.12.2共模抑制比的重要性 11.12.3由CMRR产生的电压跟随器 增益误差 11.12.4共模输入电阻 11.12.5CMRR的另一种解释 11.12.6电源抑制比 11.13运算放大器的频率响应 和带宽 11.13.1同相放大器的频率 响应 11.13.2反相放大器的频率 响应 11.13.3利用反馈控制频率 响应 11.13.4大信号限制——摆率和满功率 带宽 11.13.5运算放大器频率响应的宏 模型 11.13.6运算放大器的SPICE宏 模型 11.13.7通用运算放大器 实例 11.14反馈放大器的稳定性 11.14.1奈奎斯特图 11.14.2一阶系统 11.14.3二阶系统和相位 裕度 11.14.4阶跃响应和相位裕度 11.14.5三阶系统和增益 裕度 11.14.6根据伯德图判断 稳定性 小结 关键词 参考文献 习题 第12章 运算放大器应用 12.1级联放大器 12.1.1二端口表示 12.1.2放大器专有名词回顾 12.1.3级联放大器的频率 响应 12.2仪表放大器 12.3有源滤波器 12.3.1低通滤波器 12.3.2带增益的高通滤波器 12.3.3带通滤波器 12.3.4灵敏度 12.3.5幅值和频率缩放 12.4开关电容电路 12.4.1开关电容积分器 12.4.2同相SC积分器 12.4.3开关电容滤波器 12.5数/模转换 12.5.1数/模转换器基础 12.5.2数/模转换器误差 12.5.3数/模转换电路 12.6模/数转换 12.6.1模/数转换器基础 12.6.2模/数转换器误差 12.6.3基本模/数转换技术 12.7振荡器 12.7.1振荡的巴克豪森 准则 12.7.2带频率选择RC网络的 振荡器 12.8非线性电路的应用 12.8.1精密半波整流器 12.8.2非饱和的精准整流 电路 12.9正反馈电路 12.9.1比较器和施密特触发器 12.9.2非稳态多谐振荡器 12.9.3单稳态多谐振荡器或单稳态 电路 小结 关键词 补充阅读 习题 第13章 差分放大器和运算放大器 设计 13.1差分放大器 13.1.1双极型和MOS差分 放大器 13.1.2双极型差分放大器的直流 分析 13.1.3双极型差分放大器的传输 特性 13.1.4双极型差分放大器的交流 分析 13.1.5差模增益以及输入和输出 电阻 13.1.6共模增益和输入 电阻 13.1.7共模抑制比(CMRR) 13.1.8差模和共模的半电路 分析 13.1.9电流源的偏置 13.1.10在SPICE中为电子电流 源建模 13.1.11MOSFET差分放大器的 直流分析 13.1.12差模输入信号 13.1.13MOS差分放大器的小信号 传输特性 13.1.14共模输入信号 13.1.15差分对模型 13.2基本运算放大器的演进 13.2.1运算放大器的两级原型 13.2.2提高运算放大器的电压增益 13.2.3达林顿对 13.2.4减小输出电阻 13.2.5CMOS运算放大器 原型 13.2.6BiCMOS放大器 13.2.7全晶体管实现电路 13.3输出级 13.3.1源极跟随器——A类 输出级 13.3.2A类放大器的效率 13.3.3B类推挽输出级 13.3.4AB类放大器 13.3.5运算放大器的AB类 输出级 13.3.6短路保护 13.3.7变压器耦合 13.4电子电流源 13.4.1单晶体管电流源 13.4.2电路源的品质因数 13.4.3高输出电阻电流源 13.4.4电流源设计实例 小结 关键词 参考文献 补充阅读 习题 第14章 模拟集成电路设计 技术 14.1电路元件匹配 14.2电流镜 14.2.1MOS晶体管电流镜的 直流分析 14.2.2改变MOS镜像比率 14.2.3双极型晶体管电流镜的 直流分析 14.2.4改变BJT电流镜的镜像比率 14.2.5多级电流源 14.2.6缓冲电流镜 14.2.7电流镜像的输出 阻抗 14.2.8电流镜的二端口 模型 14.2.9Widlar电流源 14.2.10MOS管Widlar电 流源 14.2.11弱反转中的MOS Widlar源 14.3高输出电阻电流镜 14.3.1Wilson电流源 14.3.2Wilson电流源的 输出电阻 14.3.3Cascode电流源 14.3.4Cascode电流源的 输出电阻 14.3.5可调Cascode电流源 14.3.6电流镜小结 14.4参考电流的产生 14.5与电源电压无关的偏置 14.5.1基于VBE的参考源 14.5.2Widlar电流源 14.5.3与电源电压无关的 偏置单元 14.5.4与电源电压无关的MOS 参考单元 14.6带隙基准源 14.7电流镜作为有源负载 14.7.1带有源负载的CMOS 差分放大器 14.7.2带有源负载的双极 差分放大器 14.8运算放大器中的源负载 14.8.1CMOS运算放大器电压增益 14.8.2直流设计注意事项 14.8.3双极型运算放大器 14.8.4输入级击穿 14.9μA741运算放大器 14.9.1电路总体工作原理 14.9.2偏置电路 14.9.3μA741输入级的直流分析 14.9.4μA741输入级的交流分析 14.9.5整体放大器的 电压增益 14.9.6μA741的输出级 14.9.7输出阻抗 14.9.8短路保护电路 14.9.9μA741运算放大器 特性小结 14.10Gilbert模拟乘法器 小结 关键词 参考文献 补充阅读 习题 第15章 晶体管反馈放大器与 振荡器 15.1基本反馈系统回顾 15.1.1闭环增益 15.1.2闭环阻抗 15.1.3反馈的作用 15.2反馈放大器的中频分析 15.2.1闭环增益 15.2.2输入电阻 15.2.3输出电阻 15.2.4偏移电压计算 15.3反馈放大电路举例 15.3.1串并反馈(电压串联反馈) ——电压放大器 15.3.2差分输入串并电压 放大器 15.3.3并并反馈(电压并联反馈) —— 跨阻放大器 15.3.4串串反馈(电流串联反馈) ——跨导放大器 15.3.5并串反馈(电流并联反馈) ——电流放大器 15.4反馈放大器稳定性回顾 15.4.1未补偿放大器的 闭环响应 15.4.2相位裕度 15.4.3高阶效应 15.4.4补偿放大器 响应 15.4.5小信号限制 15.5单极点运算放大器 补偿 15.5.1三级运放分析 15.5.2场效应管运放的传输零点 15.5.3双极性放大器补偿 15.5.4运算放大器的 摆率 15.5.5摆率与增益带宽积之间 的关系 15.6高频振荡器 15.6.1Colpitts 振荡器 15.6.2Hartley 振荡器 15.6.3LC振荡器的幅值 稳定 15.6.4振荡器中的负阻 15.6.5负Gm振荡器 15.6.6晶体振荡器 15.6.7环形振荡器 15.6.8正反馈和闭锁 小结 关键词 补充阅读 习题 附录 附录A标准离散元件参数 附录B固态器件模型及SPICE 仿真参数 附录C二端口网络回顾 附录D物理常数和晶体管 模型概述